Electrostatic discharge (ESD) and electrical overstress (EOS) protection strategies for MOS technologies are driven by the gate oxide breakdown voltage and the MOS breakdown voltage of the output buffers. The difference between the power supply voltage (VDD) and these breakdown voltages is, during normal operation, only a few volts in the most advanced MOS processes. As a result, the design of ESD protection devices that rely on breakdown has become more complicated, since protection structures are expected to be entirely passive (i.e., not triggered) during normal operation, and yet they should still trigger at a low voltage during ESD event.
Various techniques have been proposed to protect integrated circuits (IC's) from damage caused by ESD. The design goals of higher speed and lower power dissipation promote smaller device geometries operating at reduced supply voltages and having lower breakdown voltages. ESD protection strategies that are viable with earlier generations of IC's are not always suitable for use with the newest generations. For example, isolation resistors that were tolerable in earlier designs may be unacceptable in present day high performance IC's. A preferred protection strategy for these situations is often to rely upon the triggering of active devices, such as low voltage SCR's (LVSCR's). It is desirable for the triggering threshold of the LVSCR's to be as low as possible (which can be just a few volts), unless the IC has power applied, in which case the threshold must exceed the power supply by some margin. This sort of operation for the ESD protection device has been termed "bi-modal triggering". This works, but is not always appropriate for all applications. For example, some interface IC's are coupled to connectors in first equipment that may be driven by bussed signals originating in second equipment and communicated to other equipment also on the bus. If the first equipment is unpowered (although its I/O connector is still "hot" in that it is being driven by other equipment) its ESD protection threshold can be reduced to below the level of the signals being exchanged between the first and third equipment. The resulting triggering of the ESD protection devices, while not likely to cause physical damage, can destroy the integrity of the communication on the bus. It would be desirable if the bi-modal ESD trigger circuit could be equipped with an increased threshold to be used when power is unapplied, but which is still lower than the one used when power is applied.